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Analog Circuit Design Robust Design, Sigma Delta Converters, RFID

:	Arthur H. M. van Roermund, Michiel Steyaert, Herman Casier
:	Herman Casier, Michiel Steyaert, Arthur H.M. van Roermund
:	Analog Circuit Design Robust Design, Sigma Delta Converters, RFID
:	Springer-Verlag
:	9789400703919
:	1
:	CHF 134.80
:

:	Elektronik, Elektrotechnik, Nachrichtentechnik
:	English

:	367
:	Wasserzeichen/DRM
:	PC/MAC/eReader/Tablet
:	PDF

Analog Circuit Design contains the contribution of 18 tutorials of the 19th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series ofAnalog Circuit Design, providing valuable information and excellent overviews of:

Robust Design,
chaired by Herman Casier, Consultant
Sigma Delta Converters,
chaired by Prof. Michiel Steyaert, Catholic University Leuven
RFID,
< >chaired by Prof. Arthur van Roermund, Eindhoven University of Technology

is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

	Preface	5
	Contents	8
	Contributors	10
	Part I Robust Design	14
	Modeling and Design for Reliability of Analog Integrated Circuits in Nanometer CMOS Technologies	16
	1 Introduction	16
	2 Variability- and Reliability-Induced Analog Circuit Performance Degradation	17
	2.1 Variability and Mismatch	17
	2.2 Time-Dependent Degradation	18
	2.2.1 Time-Dependent Dielectric Breakdown	19
	2.2.2 Hot-Carrier Injection	19
	2.2.3 Negative Bias Temperature Instability	19
	3 Reliability Analysis of Analog Integrated Circuits	20
	3.1 Illustrative Circuit Example	22
	4 Circuit Techniques for Variability and Degradation Resilience	24
	4.1 Solutions to Processing Variability	24
	4.2 Solutions to Time-Dependent Degradation	25
	5 Conclusions	28
	References	28
	Modeling and Simulation of Statistical Variability in Nanometer CMOS Technologies	30
	2 Sources of Statistical Variability	31
	3 Statistical Variability in Advanced CMOS Devices	32
	4 Statistical Compact Model Strategy	39
	5 Impact of Statistical Variability on SRAM	42
	6 Conclusions	44
	References	45
	Advanced Physical Design in Nanoscale Analog CMOS	47
	2 Pre-Layout Simulation	48
	3 Post-Layout Simulation	49
	4 Process Variability	50
	5 Mitigating Local Mismatch Errors	51
	5.1 Quantum-Effect Mismatch Errors	51
	5.2 Stress-Induced Mismatch Factors	52
	5.3 High-Frequency Device Matching	52
	5.4 Strategy for Matching as Devices are Downscaled	52
	6 HF Analog Device Physical Design	54
	6.1 Restricting the Number of Gate Fingers (F)	54
	6.2 Device Optimum Current Density Ids/(W/L