| Black_Frontmatter_O.pdf | 2 |
|---|
| Anchor 1 | 6 |
| Anchor 3 | 8 |
| Anchor 4 | 8 |
| Anchor 5 | 9 |
| Anchor 6 | 10 |
| Anchor 7 | 11 |
| Anchor 8 | 12 |
| Anchor 9 | 12 |
| Anchor 10 | 13 |
| Black_Ch01_O.pdf | 23 |
|---|
| Chapter 1 | 23 |
| Why SYSTEMC: ESL and TLM | 23 |
| 1.1 .Introduction | 23 |
| 1.2 .ESL Overview | 24 |
| 1.2.1 .Design Complexity | 24 |
| 1.2.2 .Shortened Design Cycle = Need For Concurrent Design | 25 |
| 1.2.2.1 .Traditional System Design Approach | 26 |
| 1.3 .Transaction-Level Modeling | 29 |
| 1.3.1 .Abstraction Models | 29 |
| 1.3.2 .An Informal Look at TLM | 30 |
| 1.3.3 .TLM Methodology | 32 |
| 1.3.3.1 .Algorithmic Modeling | 33 |
| 1.3.3.2 .Architectural Modeling | 34 |
| 1.3.3.3 .Virtual Software Development Platform | 34 |
| 1.3.3.4 .Hardware Refinement | 35 |
| 1.3.3.5 .Functional and Architectural Verification | 35 |
| 1.4 .A Language for ESL and TLM: SystemC | 36 |
| 1.4.1 .Language Comparisons and Levels of Abstraction | 37 |
| 1.4.2 .SystemC: IEEE 1666 | 38 |
| 1.4.3 .Common Skill Set | 38 |
| 1.4.4 .Proper Simulation Performance and Features | 38 |
| 1.4.5 .Productivity Tool Support | 39 |
| 1.4.6 .TLM Concept Support | 39 |
| 1.5 .Conclusion | 40 |
| Black_Ch02_O.pdf | 41 |
|---|
| Chapter 2 | 41 |
| Overview of SystemC | 41 |
| 2.1 .C++ Mechanics for SystemC | 42 |
| 2.2 .SystemC Class Concepts for Hardware | 44 |
| 2.2.1 .Time Model | 44 |
| 2.2.2 .Hardware Data Types | 45 |
| 2.2.3 .Hierarchy and Structure | 45 |
| 2.2.4 .Communications Management | 45 |
| 2.2.5 .Concurrency | 46 |
| 2.2.6 .Summary of SystemC Features for Hardware Modeling | 46 |
| 2.3 .Overview of SystemC Components | 47 |
| 2.3.1 .Modules and Hierarchy | 47 |
| 2.3.2 .SystemC Threads and Methods | 47 |
| 2.3.3 .Events, Sensitivity, and Notification | 48 |
| 2.3.4 .SystemC Data Types | 49 |
| 2.3.5 .Ports, Interfaces, and Channels | 49 |
| 2.3.6 .Summary of SystemC Components | 50 |
| 2.4 .SystemC Simulation Kernel | 51 |
| Black_Ch03_O.pdf | 53 |
|---|
| Chapter 3 | 53 |
| Data Types | 53 |
| 3.1 .Native C++ Data Types | 53 |
| 3.2 .SystemC Data Types Overview | 54 |
| 3.3 .SystemC Logic Vector Data Types | 55 |
| 3.3.1 .sc_bv. | 55 |
| 3.3.1 .sc_bv. | 55 |
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| 55 | 55 |
|---|
| 3.3.2 .sc_logic and sc_lv. | 55 |
| 3.3.2 .sc_logic and sc_lv. | 55 |
|---|
| 56 | 55 |
|---|
| 3.4 .SystemC Integer Types | 57 |
| 3.4.1 .sc_int. | 57 |
| 3.4.1 .sc_int. | 57 |
|---|
| 3.4.1 .sc_int. | 57 |
| 3.4.1 .sc_int. | 57 |
|---|
| 57 | 57 |
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| 3.4.2 .sc_bigint. | 57 |
| 3.4.2 .sc_bigint. | 57 |
|---|
| 3.4.2 .sc_bigint. | 57 |
| 3.4.2 .sc_bigint. | 57 |
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| 57 | 57 |
|---|
| 3.5 .SystemC Fixed-Point Types | 58 |
| 3.6 .SystemC Literal and String | 61 |
| 3.6.1 .SystemC String Literals Representations | 61 |
| 3.6.2 .String Input and Output | 62 |
| 3.7 .Operators for SystemC Data Types | 63 |
| 3.8 .Higher Levels of Abstraction and the STL | 65 |
| 3.9 .Choosing the Right Data Type | 66 |
| 3.10 .Exercises | 66 |
| Black_Ch04_O.pdf | 68 |
|---|
| Chapter 4 | 68 |
| Modules | 68 |
| 4.1 .A Starting Point: sc_main | 68 |
| 4.2 . The Basic Unit of Design: SC_MODULE | 70 |
| 4.3 .The SC_MODULE Class Constructor: SC_CTOR | 71 |
| 4.4 .The Basic Unit of Execution: Simulation Process | 72 |
| 4.5 .Registering the Basic Process: SC_THREAD | 73 |
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